Publication Library
Title |
Date | Size | Publication Number |
|---|---|---|---|
|
Schematics, BOM, Layout Drawing and Gerber files for ABB Module based Eval Board for XCVU33P |
Date: 01/02/2020 | Size: 3.48 MB | Publication Number: XCVU33P Design Files |
|
Legacy Pub. Design Guidelines for Power Module Remote On/Off Circuits, Application and Technical, AP97-038EPS |
Date: 06/30/1997 | Size: 98.4 KB | Publication Number: AP97-038EPS |
|
Evaluation Board |
Date: 05/09/2016 | Size: 1.7 MB | Publication Number: DLYNX_EB |
|
Evaluation Board |
Date: 04/22/2016 | Size: 881.78 KB | Publication Number: DUAL_DLYNX_EB |
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User Documentation for the FEMTODLYNXII Series Evaluation Board |
Date: 01/15/2020 | Size: 288.12 KB | Publication Number: FEMTO_EVAL |
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Application Guidelines for Power Supplies |
Date: 07/06/2015 | Size: 74.92 KB | Publication Number: AN15-002 |
|
80 PLUS Verification and Testing Report CP3500AC54TE Titanium Rating |
Date: 09/01/2015 | Size: 108.87 KB | Publication Number: 80PLUS_CP3500AC |
|
GigaDLynxII* Series Evaluation Board Documentation |
Date: 02/09/2017 | Size: 315.43 KB | Publication Number: GigaDLynx |
| Date: 04/23/2012 | Size: 1.3 MB | Publication Number: GIGATLYNX_PEB | |
|
Guidelines for selecting and designing in Hornet Series of Regulator Modules |
Date: 07/21/2017 | Size: 645.36 KB | Publication Number: AN17_002 |
|
Application Note for Interchangeable Soldering of Different Generation DOSA POL modules |
Date: 09/30/2014 | Size: 429.06 KB | Publication Number: AN11-003 |
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Guidelines for designing with CPL (Compact Power Line)Rectifiers and Converters |
Date: 06/25/2015 | Size: 920.99 KB | Publication Number: AN14-01 |
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Lattice - Integrated Power Solutions for DSPs & FPGAs |
Date: 12/18/2014 | Size: 359.74 KB | Publication Number: FPGA_Lattice |
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Layout for each rail powering the XCVU37P FPGA using ABB Modules |
Date: 10/08/2018 | Size: 5.43 MB | Publication Number: XCVU37P_Layout |
|
Layout of all ABB Module based power rails on Evaluation Board for Xilinx Kintex UltraScale+ |
Date: 12/07/2018 | Size: 2.78 MB | Publication Number: KintexUSlayout |
| Date: 08/06/2012 | Size: 1.43 MB | Publication Number: MEGALYNX_PEB | |
|
MicroDLynx II* Series Evaluation Board Documentation |
Date: 02/09/2017 | Size: 459.11 KB | Publication Number: UJT035_DLynxII |
| Date: 09/08/2010 | Size: 906.58 KB | Publication Number: NAOSRAPTOR_EB | |
|
Performance Testing of modules mounted on the XCVU37P Evaluation Board |
Date: 10/08/2018 | Size: 4.19 MB | Publication Number: Virtex XCVU37P Test Report_Final1 |
|
PicoDLynx II* Series Evaluation Board Documentation |
Date: 03/31/2017 | Size: 900.2 KB | Publication Number: PicoDLynxII |
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XLS Document: Helps designers set the output voltage of POL modules |
Date: 08/19/2013 | Size: 2.62 MB | Publication Number: POLVoltage |
|
Evaluation Board for Power Rails for XCVU5P configuration using ABB modules |
Date: 01/02/2020 | Size: 2.91 MB | Publication Number: Virtex XCVU5P BOM |
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Design Files for the Evaluation Board developed to test the modules to support the multiple rails for Xilinx Virtex XCVU37P |
Date: 01/02/2020 | Size: 5.8 MB | Publication Number: BOM_EVAL_XILINX_VIRTEXULTRASCALEPLUS_XCVU37P_GEIS_22_Design |
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Complete list of parts for Xilinx Virtex XCVU3P Power Rail Evaluation Board using ABB modules |
Date: 01/02/2020 | Size: 2.8 MB | Publication Number: Virtex XCVU3P BOM |
|
List of parts used in ABBs Eval board for rails powering the Xilinx Kintex XCKU15P configuration |
Date: 07/10/2019 | Size: 2.93 MB | Publication Number: Xilinx XCKU15P BOM |